Conventionally, a semiconductor device with a high-voltage resistance has been improved variously in order to realize a high-voltage resistance and a low price, and structures shown in FIGS. 14 and 15 have been employed.
FIG. 14 shows a schematic cross-sectional view illustrating an example of the structure of a mesa bipolar transistor. FIG. 14 comprises a silicon substrate (an N-type area) 1, a collector diffusion area 2, a base diffusion area 3, an emitter diffusion area 4, a silicon dioxide film (an electrical insulating film) 5, a mesa groove 7, an insulating protective layer 9 of the mesa region, a base electrode 10, an emitter electrode 11 and a collector electrode 12.
FIG. 15 shows a schematic cross-sectional view illustrating an example of the structure of a planar-type bipolar transistor. In FIG. 15, a numeral 13 indicates a field plate and the explanation for the same numbers as in FIG. 14 indicating the same parts is omitted.
In a mesa bipolar transistor with a high-voltage resistance shown in FIG. 14, the insulating protective layer 9 (a glass protective layer) made of a lead-based or zinc-based glass film is formed in the mesa groove 7 in which silicon is etched selectively on the surface side of the semiconductor silicon substrate 1 in order to obtain a high-voltage resistance and high-reliability. The depth of the mesa groove 7 is formed so as to be deeper than a thickness (the thickness is indicated by T) of a high-resistive area in the semiconductor substrate in order to obtain the reliability and then the insulating protective layer 9 is formed.
Since an electric field concentration occurs at the boundary region between the silicon substrate (the semiconductor substrate) 1 and the base diffusion area (one-conductive area) 3, it is desirable that the thickness of the insulating protective layer 9, especially in this region (the thickness of the insulating protective layer 9 in the vertical direction with respect to the internal circumference surface of the mesa groove 7 at the boundary region), is 10 .mu.m or more. In the case where the thickness at the boundary region is less than 10 .mu.m, its effect as an insulating protective layer in subsequent manufacturing processes is small. Therefore, a manufacturing yield decreases and high-reliability cannot be ensured.
As a method of forming the insulating protective layer (the glass protective layer) 9, an electrodeposition technique is known. A glass protective layer having a uniform thickness is easily formed at a conductive region by the electrodeposition technique. However, in the case of using the electrodeposition technique, the glass protective layer is formed at all conductive regions. Therefore, it is necessary that a contact window for forming an electrode provided in the silicon dioxide film (an electrical insulating film) 5, be formed after forming the glass protective layer. On the contrary, there has been a problem in protecting insulation, since a glass protective layer is not formed on the silicon dioxide film (an electrical insulating film) 5 around the upper region of the mesa groove 7 in principle.
Then, as a means of solving the problems of the electrodeposition technique mentioned above, it is common to form the insulating protective layer (the glass protective layer) 9 by an application method. In the case of using the application method, it is possible to form a glass protective layer regardless of the conductivity of the substrate.
However, the thickness of the glass protective layer in the periphery of an opening region of a mesa groove tends to become thin by adhesiveness, or the like, of an applied glass protective layer at the time of the application. Particularly, as mentioned above, the mesa groove 7 is formed as a deep groove having a deeper depth than the thickness (T) of the high-resistive area in the semiconductor substrate in order to obtain high reliability. Therefore, the tendency is prominent and it has been difficult to form an insulating protective layer (a glass protective layer) having a thickness of 10 .mu.m or more on the entire region of the mesa groove. As a result, variation in high voltage-resistance characteristics has occurred.
The thickness of the semiconductor substrate in the region where the mesa groove is formed decreases considerably by forming the mesa groove so as to be deeper than the thickness (T) of a high-resistive area. As a result, the mechanical strength of the semiconductor substrate decreases. Damages, such as breakage, cracking, or the like, occur in the region where the mesa groove is formed in the semiconductor substrate by mechanical contact in subsequent processes, thus decreasing the processing yield during the manufacturing process considerably.
On the other hand, in a planar-type bipolar transistor as shown in FIG. 15 it is common to realize a high-voltage resistance by using a FLR (field limiting ring) structure. However, the more resistive to a high voltage the planar-type bipolar transistor is, the larger the proportion that a field plate 13 occupies in the semiconductor substrate region must be when utilizing this technique. Thus, a problem exists in the art particularly because a utilization factor of the semiconductor substrate is greatly reduced.